A Control Word Model for detecting conflicts between microprograms
MICRO 8 Proceedings of the 8th annual workshop on Microprogramming
ACM Computing Surveys (CSUR)
Microcode compaction with timing constraints
MICRO 20 Proceedings of the 20th annual workshop on Microprogramming
The Organization of Microprogram Stores
ACM Computing Surveys (CSUR)
Local Microcode Compaction Techniques
ACM Computing Surveys (CSUR)
Some Aspects of High-Level Microprogramming
ACM Computing Surveys (CSUR)
MIDL - a microinstruction description language
MICRO 14 Proceedings of the 14th annual workshop on Microprogramming
MICRO 14 Proceedings of the 14th annual workshop on Microprogramming
Considerations for local compaction of nanocode for the nanodata QM-1
MICRO 14 Proceedings of the 14th annual workshop on Microprogramming
A survey of high level microprogramming languages
MICRO 13 Proceedings of the 13th annual workshop on Microprogramming
Hierarchical microprogram generating system
MICRO 12 Proceedings of the 12th annual workshop on Microprogramming
A technique of global optimization of microprograms
MICRO 11 Proceedings of the 11th annual workshop on Microprogramming
Improved instruction formation in the exhaustive local microcode compaction algorithm
MICRO 17 Proceedings of the 17th annual workshop on Microprogramming
Programming and Computing Software
Local and global microcode compaction using reduction operators
ACM SIGMICRO Newsletter
On the formal pescription of microoperations and its impact on automatic microcode generation
ACM SIGMICRO Newsletter
The MPG System: A Machine-Independent Efficient Microprogram Generator
IEEE Transactions on Computers
IEEE Transactions on Computers
V-Compiler: a next-generation tool for microprogramming
AFIPS '81 Proceedings of the May 4-7, 1981, national computer conference
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This paper describes a microprogram optimization technique considering resource occupancy and microinstruction format. This technique is applicable to machines whose microoperation occupies several machine cycles on a submachine cycle basis, and whose microinstruction format varies from horizontal to partially encoded, to vertical. “Microtemplate” is proposed to represent fetch timing and period of resource usage for a microoperation on a machine cycle and submachine cycle basis. An algorithm is shown, which detects concurrency of sequentially written microoperations through manipulation of microtemplates. An algorithm of microinstruction format selection is also discussed which decides one instruction format when several candidates exist. Effectiveness of this technique is evaluated. Efficient object codes are generated when applied to a practical sophisticated microprogrammable computer.