Approaches to design of high level languages for microprogramming

  • Authors:
  • Patrick W. Mallett;T. G. Lewis

  • Affiliations:
  • -;-

  • Venue:
  • MICRO 7 Conference record of the 7th annual workshop on Microprogramming
  • Year:
  • 1974

Quantified Score

Hi-index 0.00

Visualization

Abstract

The development of a programming language for microprocessors (we will use the term microprocessor to refer to the hardware host to be microprogrammed) differs from the development of languages for conventional processors [5, 6]. The difference is traced to: (1) concurrency of hardware (2) limited writable local memory (3) main memory access delay and I/0 control (4) limited microprocessor instruction repertoire (5) special hardware characteristics that impact heavily upon machine efficiency. These features impose restrictions upon the compiler writer that have not been fully overcome [5, 6, 8, 10, 14]. Writable control memory, for example, places severe restrictions on the designer who wishes to implement a syntax driven compiler that produces many intermediate results that must be stored. It is not the intention of this paper to advocate a solution to any of the five problems listed above or to propose a particular language design. Instead we will present a basic compilation model (see Figure 1) and briefly discuss some of the alternatives to be considered at each level of the model. The discussion is broken into five areas: (a) syntax design, (b) phase I interface design, (c) intermediate language design, (d) phase II interface design, and (e) micro-instruction format considerations. In addition section 3 presents various arguments on timing and concurrency recognition. Finally, section 4 proposes a translator writing system to aid in microcompiler (a translator that produces microprograms) development.