Automated Design of Multiple-Valued Logic Circuits by Automatic Theorem Proving Techniques
IEEE Transactions on Computers
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This paper deals with the problem of designing multiple-valued combinational functions and memory functions by complex modules. It is shown how logical functions can be described by Postian vectors or by polynomials which are based on operations of the ordinary arithmetic such as addition and multiplication. Two equations &ubarbelow; &equil; &Sbarbelow; &vbarbelow; and &ubarbelow;' &equil; &Sbarbelow; &vbarbelow;' are derived, by which all problems arising with two-level decomposition are solved. The solution to these problems is demonstrated by two examples.