An efficient on chip deterministic test pattern generation scheme

  • Authors:
  • A. K. Das;P. P. Chaudhuri

  • Affiliations:
  • Indian Institute of Technology, Kharagpur, India;Indian Institute of Technology, Kharagpur, India

  • Venue:
  • Microprocessing and Microprogramming
  • Year:
  • 1989

Quantified Score

Hi-index 0.00

Visualization

Abstract