The design of an emulator for a parallel machine language

  • Authors:

  • Victor R. Lesser

  • Affiliations:

  • Computer Science Department, Carnegie-Mellon University

  • Venue:
  • Proceedings of the meeting on SIGPLAN/SIGMICRO interface
  • Year:
  • 1973

Quantified Score

Hi-index 0.00

Visualization

Abstract

A paradigm is developed for structuring a complex emulator operating in a parallel hardware environment. This paradigm is based on the view that a complex emulator is best structured as of a set of microprocesses, each performing a small independent task, that interact in a closely-coupled manner. This is in contrast to the conventional method of structuring an emulator as a set of subroutines with a sequential flow of control among them. The design of an emulator for a parallel machine language (i.e. Adam's Graph Machine Language) using the new paradigm is discussed in detail, including the dynamic execution characteristics of the emulator in a parallel hardware environment. The analysis indicates that, given an appropriate microcomputer architecture, this structuring allows an emulator for a parallel machine language to be naturally and compactly coded and to fully map parallelism at the emulated machine language level into parallelism at the hardware level. In particular, it has been shown that an emulator can be structured so as to utilize well more than sixteen identical microprocessors. In addition, the emulator uses the idea of tailoring an emulator's control structure both to the emulated machine language and dynamically to the specific program being emulated.