Compilation of data-driven programs for synchronous execution
POPL '83 Proceedings of the 10th ACM SIGACT-SIGPLAN symposium on Principles of programming languages
Concert: design of a multiprocessor development system
ISCA '86 Proceedings of the 13th annual international symposium on Computer architecture
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The Pringle is a 64 processor MIMD computer with a 64 M (8 bit) instructions per second execution rate. (Copies are running at Purdue and Washington.) The Pringle runs programs written for the Configurable, Highly Parallel (CHiP) Computer. That is, the Pringle executes the 64 separate instruction streams as well as the interconnection (phase) stream that configures the lattice of a 64 processor CHiP computer. But the Pringle is not a CHiP. It gives the illusion of the CHiP machine's conflict-free, point-to-point communication using a 64 Mbit internal polled bus. In addition to describing the design goals and the Pringle architecture, this paper identifies two problems common to novel architecture implementation projects, the “wisdom of experience” problem and the “single instance” problem, and expalins how they were addressed for the Pringle.