On the performance of loosely coupled multiprocessors

  • Authors:
  • Laxmi N. Bhuyan

  • Affiliations:
  • Department of Electrical and Computer Engineering, University of Southwestern Louisiana, Lafayette, LA

  • Venue:
  • ISCA '84 Proceedings of the 11th annual international symposium on Computer architecture
  • Year:
  • 1984

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Abstract

A Processing Element (PE) essentially consists of a processor and a memory module. A loosely coupled multiprocessor is comprised of a set of such PEs interconnected through an Interconnection Network (IN). The design of the IN is crucial to an efficient communication beween the PEs. This paper presents approximate evaluations of two loosely coupled architectures, each having three types of INs, namely: shared bus, crossbar and a class of Multistage Interconnection Networks (MINS) called Omega network. Probability of Acceptance (PA) of a message is considered as a measure of the performance. For a high rate of internal requests, it is shown that an Omega network performs close to a crossbar while reducing the the cost of interconnection to a large extent.