High level languages processor architecture

  • Authors:
  • Emilio Luque Fadon;Lorenzo Moreno Ruiz;José F. Tirado Fernandez

  • Affiliations:
  • -;-;-

  • Venue:
  • ACM '77 Proceedings of the 1977 annual conference
  • Year:
  • 1977

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Abstract

One of the present lines of research in the field of processor architecture is that oriented towards the search for the necessary devices to carry out efficient execution of the high-level languages. In this regard, the present study tries to find the ideal information structures which a processor should have for directly executing any high-level language. Those characteristics which are common to the high-level languages that the processor will execute, such as the symbolic identifier handling, block structure, dynamic memory management, definition of reentrant routines and recursive production rules are those which will condition the definition of the information structures.