Heuristic switching expression simplification

• Authors: Melvin A. Breuer
• Venue: ACM '68 Proceedings of the 1968 23rd ACM national conference
• Year: 1968

One very profitable application of computer aided design is in the design and construction of digitial computers. 1 A classical problem in computer design is that associated with the simplification of Boolean switching expressions. Numerous algorithms exist for solving this problem, such as the Karnaugh or Veitch graph method, the Quine—McCluskey technique, the cubical complex approach of Roth,2 or the recently published procedure of Svoboda.3 In general, the classical minimization procedure consists first of generating all the canonical terms of a function, secondly of generating all of the prime implicants, and finally of selecting a minimal cover which consists of some subset of the set of prime implicants. For some techniques, these first two steps can be partially eliminated as illustrated by repeatedly applying the #-algorithm of Roth. The resulting solution usually represents a minimal diode or minimal gate two-level AND-OR or NAND representation of the given function. Many switching expressions encountered in the design of digital systems contain 20 or more variables. Usually they are obtained in one of two ways, i.e., either automatically by a logic generating system such as described by Gorman and Anderson, 4 or manually by a logic designer. In either case the equations are very seldom expressed in canonical form, but rather are usually in some near minimal normal form. Hence, it has generally been found to be impractical to spend hours of computation time to reduce a near minimal expression in order to save a few diodes or gates.