Horizontal architecture for high performance parallel communication systems

  • Authors:
  • Pyeong Jung Kim;Sang Hwan Kung;Seung Ku Hwang

  • Affiliations:
  • -;-;-

  • Venue:
  • HPC-ASIA '97 Proceedings of the High-Performance Computing on the Information Superhighway, HPC-Asia '97
  • Year:
  • 1997

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Abstract

With the advent of high-speed networking technologies such as fiber optics, a traditional bottleneck in communication has disappeared. Now, the speed at which a processor can execute a communication protocol is the most significant limiting factor in protocol performance. The question is, how can a multimedia application take best advantage of these high-speed networks? We adopt an optimized implementation approach that allows efficient use of the bandwidth available on today's high-speed networks. In this paper, we propose a new horizontal processing architecture that processes data as soon as it arrives from the network. This model increases the processing speed of the OSI model by using a multiple-instruction, single-data (MISD) scheme. However, the OSI protocol stack often imposes ordering constraints that prevent concurrent processing of the protocol layers. By using a fixed packet format, all layers from the network layer through to the presentation layer are processed in parallel. A prototype shows that the proposed model has a performance improvement of up to 60% more than the conventional approach.