Shifted Recursive Torus Interconnection for High Performance Computing

Authors:
Yasushi Inoguchi;Susumu Horiguchi
Affiliations:
-;-
Venue:
HPC-ASIA '97 Proceedings of the High-Performance Computing on the Information Superhighway, HPC-Asia '97
Year:
1997

Citing 2
Cited 1

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A deadlock-free routing algorithm using minimum number of virtual channels and application mappings for Hierarchical Torus Network

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Abstract

In this paper, we propose the Shifted Recursive Torus (SRT) interconnection network for high performance computing. By adding multi-level links to the torus network recursively, the SRT can achieve excellent interconnection feature such as a smaller diameter, a limited number of links per node, an easy implementation in VLSI, and an expandable hierarchical structure. This paper considers the problem to achieve an efficient routing on the SRT. We propose a recursive routing algorithm on the SRT whose performance is almost same of the optimal routing. A high-performance computing of FFT is discussed by embedding the data structure into the SRT.