NeuroFPGA -- Implementing Artificial Neural Networks on Programmable Logic Devices
Proceedings of the conference on Design, automation and test in Europe - Volume 3
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A digital hardware implementation of a whole neural network learning is described. It uses on-line arithmetic on FPGAs. The modularity of our solution avoids the development problems that occur with more usual hardware circuits. A precise analysis of the computations required by the back-propagation algorithm allows us to maximize the parallism of our implementation.