An Evolved Circuit, Intrinsic in Silicon, Entwined with Physics
ICES '96 Proceedings of the First International Conference on Evolvable Systems: From Biology to Hardware
Automated Analog Circuit Sythesis Using a Linear Representation
ICES '98 Proceedings of the Second International Conference on Evolvable Systems: From Biology to Hardware
GECCO '96 Proceedings of the 1st annual conference on Genetic and evolutionary computation
A Flexible Model of a CMOS Field Programmable Transistor Array Targeted for Hardware Evolution
ICES '00 Proceedings of the Third International Conference on Evolvable Systems: From Biology to Hardware
ICES '00 Proceedings of the Third International Conference on Evolvable Systems: From Biology to Hardware
ICES '00 Proceedings of the Third International Conference on Evolvable Systems: From Biology to Hardware
Initial Experiments of Reconfigurable Sensor Adapted by Evolution
ICES '01 Proceedings of the 4th International Conference on Evolvable Systems: From Biology to Hardware
ICES '01 Proceedings of the 4th International Conference on Evolvable Systems: From Biology to Hardware
Steps forward to evolve bio-inspired embryonic cell-based electronic systems
ICES'07 Proceedings of the 7th international conference on Evolvable systems: from biology to hardware
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Evolvable Hardware is reconfigurable hardware that self-configures under the control of an evolutionary algorithm. The search for a hardware configuration can be performed using software models or, faster and more accurate, directly in reconfigurable hardware. Several experiments have demonstrated the possibility to automatically synthesize both digital and analog circuits. The paper introduces an approach to automated synthesis of CMOS circuits, based on evolution on a Programmable Transistor Array (PTA). The approach is illustrated with a software experiment showing evolutionary synthesis of a circuit with a desired DC characteristic. A hardware implementation of a test PTA chip is then described, and the same evolutionary experiment is performed on the chip demonstrating circuit synthesis/self-configuration directly in hardware.