Logic design theory
Implementation of Data Flow Logical Operation via Self-Assembly of DNA
Proceedings of the 11 IPPS/SPDP'99 Workshops Held in Conjunction with the 13th International Parallel Processing Symposium and 10th Symposium on Parallel and Distributed Processing
Simulating Boolean Circuits on a DNA Computer
Simulating Boolean Circuits on a DNA Computer
The Minimum DNA Computation and its Computational Power
The Minimum DNA Computation and its Computational Power
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In this paper we implement a new logic NAND gate using standard operations on DNA strands as well as digestion by the restriction nuclease class II. This concept despite some difficulties looks in general more elegant and can be utilized with fluorescent probes. Some experimental results demonstrating implementation of a single logic NAND gate are provided. The derived logic gates are proposed to be implemented on DNA chips.