Proceedings of the 24th annual international symposium on Computer architecture
Leveraging Optical Technology in Future Bus-based Chip Multiprocessors
Proceedings of the 39th Annual IEEE/ACM International Symposium on Microarchitecture
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Optical interconnects offer interesting new possibilities because of the potential for scalable broadcast. Unfortunately, most current algorithms using broadcast do not scale well because of the rapid increase in message processing resulting from broadcast, and particularly because of potential uneven distribution of the work. We describe a novel design as an example of how an architecture might exploit broadcast capability not so much to speed up easily parallelized code as to minimize the effects of serial bottlenecks. While compatible with compiler-discovered parallel programs, the architecture appears particularly promising for code that exhibits serial bottlenecks. The architecture appears well suited for future directions of semiconductor and optical technologies.