A Hardware and Software Monitor for High-Level System-on-Chip Verification
ISQED '01 Proceedings of the 2nd International Symposium on Quality Electronic Design
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The lifecycle for industrial applications are becoming shorter, the application complexity increases, performance is to low, fault tolerance is required, reuse of components is desired and the developer require strong verification tools to cut down the verification phase. As the problem increases with respect of longer development time and higher quality requirements from the customer, it becomes increasingly important to examine flexible and scalable parallel processing for complex real-time systems. This is the motivation for running the research project SARA (Scalable Architecture for Real-Time Applications). The first SARA system is now running with a vision system connected to an industrial robot (ABB Robot). The system-busses are important resources in a computer-system. Today there are no methods to monitor busload during runtime, in this paper we discuss a simple method of how to do this.