Supporting Embedded System Design Capture, Analysis and Navigation-
ASWEC '97 Proceedings of the Australian Software Engineering Conference
A Cyclic-Executive-Based QoS Guarantee over USB
RTAS '03 Proceedings of the The 9th IEEE Real-Time and Embedded Technology and Applications Symposium
An analysis framework for network-code programs
EMSOFT '06 Proceedings of the 6th ACM & IEEE International conference on Embedded software
A priority assignment strategy of processing elements over an on-chip bus
Proceedings of the 2007 ACM symposium on Applied computing
Proceedings of the 2007 ACM symposium on Applied computing
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This paper develops formal scheduling models for several common system bus architectures used in PC and workstation systems. The scheduling models include fixed priority, round robin, and hybrid bus scheduling policies. The models provide a quantitative means to explore the real-time design space for each of the buses. This paper provides a simple approach for the creation of bus scheduling models which can be used effectively by a bus designer or system user to improve real-time bus performance. The step by step process of model development is presented. In addition, an application modeling methodology is described which separates the application requirements from the bus model. The utility of the scheduling models is demonstrated by analyzing several common system buses.