Portable and architecture independent parallel performance tuning using BSP
Parallel Computing
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This paper discusses the running time cost of performing discrete-event simulation on the bulk-synchronous parallel (BSP) model of computing. The BSP model provides a general purpose framework for parallel computing which is independent of the architecture of the computer, and thereby it enables the development of portable software. In addition, the structure of BSP computations allows the accurate determination of the cost of parallel algorithms. We use this feature to devise a performance prediction methodology that enables the designer of parallel simulation models to predict in advance the systems which are amenable for efficient execution on a given BSP computer. The methodology is simple enough to be automated in parallel simulation languages.