A Methodology for the Placement and Optimization of Decoupling Capacitors for Gigahertz Systems

Authors:
Jinseong Choi;Sunjun Chun;Nanju Na;Madhavan Swaminathan;Larry Smith
Affiliations:
-;-;-;-;-
Venue:
VLSID '00 Proceedings of the 13th International Conference on VLSI Design
Year:
2000

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Cited 1

On-chip decoupling capacitor optimization using architectural level prediction

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

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Abstract

This paper discusses a method for computing the effect of decoupling capacitors on the power delivery system for gigahertz packages and boards. A fast and accurate computational method is presented that can be used to estimate the amount of decoupling required, the type of capacitor to be used and its location(ohchiop, package or board)