Embedded DRAM (eDRAM) Power-Energy Estimation for System-on-a-chip (SoC) Applications

Authors:
Yong-Ha Park;Hoi-Jun Yoo;Jeonghoon Kook
Affiliations:
Dept. of EE, Korea Advanced Institute of Science and Technology (KAIST), Taejon, Korea;Dept. of EE, Korea Advanced Institute of Science and Technology (KAIST), Taejon, Korea;Memory R&D Division, Hynix Semiconductor Inc., Ichon, Kyoungki-do, Korea
Venue:
ASP-DAC '02 Proceedings of the 2002 Asia and South Pacific Design Automation Conference
Year:
2002

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Abstract

EmbeddedDRAM (eDRAM) power-energy estimation is presented for system-on-a-chip (SOC) applications. The main feature is the signal swing based analytic (SSBA) model, which improves the accuracy of the conventional SRAM power-energy models. The SSBA model combined with the high-level memory access statistics provides a fast and accurate system level power-energy estimation of eDRAM.The power-energy estimation using SSBA model shows 95% accuracy compared with the transistor level power simulationresults for three fabricated eDRAMs.