Trading-off Power versus Area through a Parameterizable Model for Virtual Memory Management

Authors:
Julio L. da Silva Jr;Francky Catthoor;Diederik Verkest; Hugo de Man
Affiliations:
-;-;-;-
Venue:
VOLTA '99 Proceedings of the IEEE Alessandro Volta Memorial Workshop on Low-Power Design
Year:
1999

Citing 0
Cited 2

Fast cache and bus power estimation for parameterized system-on-a-chip design

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How to solve the current memory access and data transfer bottlenecks: at the processor architecture or at the compiler level

DATE '00 Proceedings of the conference on Design, automation and test in Europe

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Abstract

In this paper we present a parameterizable model for power and area exploration of applications with dynamic data types. This model enables the designer to explore different Virtual Memory Management mechanisms for those data types. This exploration is crucial to obtain effective solutions in an embedded (HW or SW) processor context.Our model, called Flexible Pools, is a significant extension and parameterization of Quick Lists. Flexible Pools allows the designer to trade-off power and area, matching the requirements of a given application.We demonstrate the results for trading-off power versus area in an industrial example. These experiments show power savings up to a factor of nearly 3 and area savings up to a factor of nearly 2.