A Rate-Based Message Scheduling Paradigm

  • Authors:
  • Hung-Ying Tyan;Chao-Ju Hou

  • Affiliations:
  • -;-

  • Venue:
  • WORDS '99 Proceedings of the Fourth International Workshop on Object-Oriented Real-Time Dependable Systems
  • Year:
  • 1999

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Abstract

One of the most important issues in establishing connections with QoS requirements and providing timely and predictable communication services is the choice of message scheduling algorithms at the end/intermediate nodes in the network. We propose in this paper a generic rate-based scheduling paradigm that can serve as a vehicle either for implementing existing well-known rate-based message scheduling algorithms, or for designing new rate-based message scheduling algorithms. The proposed scheduling paradigm is general enough to encompass a wide spectrum of rate-based scheduling algorithms and is flexible enough to allow realization of several desirable features, e.g., rate enforcement, capability of handling overbooking, and capability of providing rate parameters for traffic monitoring. Its modular design also facilitates realization of multiple scheduling algorithms in an uniform framework. Different levels of QoS can be provided to applications by invoking appropriate message schedulers implemented in the same framework.We demonstrate the use of the proposed scheduling paradigm by implementing the following two well-known families of message scheduling algorithms: (1) VirtualClock [zhang:93] and its variations Self-Clocked Fair Queuing (SCFQ) [golestani:94] and {\em Leap Forward Virtual Clock} (LFVC) [suri:97], and (2) Generalized Processor Sharing (GPS) [parekh:93,parekh:94] (or termed elsewhere Weighted Fair Queuing [demers:89]) and its realistic implementations Packet-by-Packet Generalized Processor Sharing (PGPS) [parekh:93,parekh:94] and Worst-case Fair Weighted Fair Queuing (WF^2Q) [zhang:96]. We also design a new and simple message scheduling algorithm, called FIFO-r, using the paradigm, and derive analytically both the actual service rate and the end-to-end delay under FIFO-r.