The Asynchronous Transfer Mode: a tutorial
Computer Networks and ISDN Systems - Special issue on the ATM—asynchronous transfer mode
The Stanford FLASH multiprocessor
ISCA '94 Proceedings of the 21st annual international symposium on Computer architecture
The MIT Alewife machine: architecture and performance
ISCA '95 Proceedings of the 22nd annual international symposium on Computer architecture
Coordinating parallel processes on networks of workstations
Journal of Parallel and Distributed Computing
THE MIT ALEWIFE MACHINE: A LARGE-SCALE DISTRIBUTED-MEMORY MULTIPROCESSOR
THE MIT ALEWIFE MACHINE: A LARGE-SCALE DISTRIBUTED-MEMORY MULTIPROCESSOR
Automating the drug scheduling of cancer chemotherapy via evolutionary computation
Artificial Intelligence in Medicine
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The objectives of this effort are: 1) to provide a faster (parallel) implementation to a previously implemented ATM network design simulator [1], and 2) to compare two different PDC architectures in order to select one to be the architecture for this new parallel version. To improve the performance of the previously implemented GA. two parallel versions are developed using two different approaches. The first is using Message Passing Interface (MPI) function calls embedded in C--programs on a network of workstations. The second version is developed for a multi-processor system using a CAC-Parallel compiler.This paper describes the approaches used to develop the parallel versions, the design of parallel applications and the results of all the experiments that were done to study the effect of all the design parameters on systems performance.