Proceedings of the 30th annual international symposium on Computer architecture
Improving security for periodic tasks in embedded systems through scheduling
ACM Transactions on Embedded Computing Systems (TECS)
An adaptive cache coherence protocol for chip multiprocessors
Proceedings of the Second International Forum on Next-Generation Multicore/Manycore Technologies
Enhancing security of real-time applications on grids through dynamic scheduling
JSSPP'05 Proceedings of the 11th international conference on Job Scheduling Strategies for Parallel Processing
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On-line transaction processing exhibits poor memory behavior in high-end multiprocessor servers because of complex sharing patterns and substantial interaction between the database server and the operating system. One contributing source is a large amount of load-store sequences in the program, resulting in many read misses as well as much global invalidation traffic.In this paper, we characterize the nature of these load-store sequences, and analyze contributing code- and data structures in the database handler, operating system, and system libraries. We explore two conceptually different approaches for detecting load-store sequences; data-centric and instruction-centric, and the goal is to load the cache block exclusively already at the load instruction so that the store instruction can perform locally. Our results were obtained using program-driven simulation of a TPC-B based workload on a four-node multiprocessor.The results show that there is a substantial amount of load-store sequences in the database handler, the operating system, and in system libraries, and about 40% of all global writes belong to such sequences. Even though the techniques were able to reduce the execution time for the application by up to 10%, the complex behavior of the database workload reduced the effectiveness of traditional optimization techniques for migratory sharing.