Schedulability analysis with UML
UML for real
Transforming Structural Model to Runtime Model of Embedded Software with Real-Time Constraints
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe: Designers' Forum - Volume 2
From UML/SPT models to schedulability analysis: approach and a prototype implementation using ATL
Automated Software Engineering
An evaluation of timed scenario notations
Journal of Systems and Software
Early schedulability analysis with timed use case maps
SDL'09 Proceedings of the 14th international SDL conference on Design for motes and mobiles
Scalable real-time system design using preemption thresholds
RTSS'10 Proceedings of the 21st IEEE conference on Real-time systems symposium
Designing for schedulability: integrating schedulability analysis with object-oriented design
Euromicro-RTS'00 Proceedings of the 12th Euromicro conference on Real-time systems
A component-based model integrated framework for embedded software
ICESS'04 Proceedings of the First international conference on Embedded Software and Systems
Model-Driven architecture for hard real-time systems: from platform independent models to code
ECMDA-FA'05 Proceedings of the First European conference on Model Driven Architecture: foundations and Applications
Proceedings of the 14th ACM SIGPLAN/SIGBED conference on Languages, compilers and tools for embedded systems
| Hi-index | 0.00 |
In this paper we present an approach towards automatic synthesis of implementations from real-time object-oriented design models. From an application design model that addresses the functional requirements of the system, and given end-to-end timing requirements, our synthesis approach generates a feasible implementation model, i.e., one that will meet the timing requirements.The synthesis process is supported by automatic code-generation that can take the application design model and the synthesized implementation model, and can generate code for the target platform. The synthesis of an implementation model is facilitated through the use of a generic (application independent) implementation architecture; thereby reducing the synthesis problem to selecting a mapping of the application design model to the artifacts of the implementation architecture.In this paper we use a multi-threaded event handling architecture with fixed event priorities. The synthesis problem then consists of determining priorities for events and mapping of events to threads. We show how, given such a mapping, the response times can be analyzed, and then how, using the analysis, a feasible implementation model can be automatically synthesized.