Modeling and Analysis of Using Memory Management Unit to Improve Software Reliability

  • Authors:
  • Shih-Jeh Chang;Prudence T. Zacarias Kapauan

  • Affiliations:
  • -;-

  • Venue:
  • ISSRE '01 Proceedings of the 12th International Symposium on Software Reliability Engineering
  • Year:
  • 2001

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Abstract

Voice and data convergence, voice over packets and 3G Wireless demand rapid evolvability for switching systems to succeed in the global marketplace. To succeed, a switching platform's software architecture must be able to quickly absorb new technologies andrespond to new market needs. This presents a new challenge to switching software architects because a switching platform must also be able to meet very stringent reliability requirements. One such requirement is no more than 0.5 minute per year of total downtime (i.e. better than six 9's in total system availability) as specified in Telecordia's GR-929-CORE. This paper establishes a framework for improving switching platform software fault tolerance while meeting the needs of fast-time-to-market via the use of a very common component of modern microprocessor called memory management unit (MMU) and provides a modelingand analytical method for evaluating different implementation alternatives.Finally, the paper presents examples based on modeling a 3G Wireless switching platform, to illustrate the effectiveness of using the proposed method. Modeling results show more than 200times improvement can be achieved with use of MMU.