A Dynamically Reconfigurable Mixed In-Order/Out-of-Order Issue Queue for Power-Aware Microprocessors

  • Authors:
  • Yu Bai;R. Iris Bahar

  • Affiliations:
  • -;-

  • Venue:
  • ISVLSI '03 Proceedings of the IEEE Computer Society Annual Symposium on VLSI (ISVLSI'03)
  • Year:
  • 2003

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Abstract

In this work we focus on power-aware solutions for theissue queue in an out-of-order superscalar processor. Wepropose two different schemes. Our first approach partitions the issue queue into FIFOs such that only the instructions at the head of each FIFO may request to issue. Wethen dynamically monitor the FIFO usage and disable FIFOs that are not being efficiently used. In our second approach we also use a FIFO scheme, but dynamically varythe number and size of each FIFO simultaneously while atthe same time keeping the total number of issue queue entries constant. We analyze both approaches and comparethem in terms of the performance and power reduction. Wefind that although the first scheme of completely disablingissue queue entries is more straight-forward to implement,it may not be the best option, particularly for floating pointapplications. Our best experimental result shows an average power saving of 27.3% in the issue queue with a performance degradation of only 2.7%.