A Realistic Architecture for Timed Testing

  • Authors:
  • Eric Petitjean;Hacène Fouchal

  • Affiliations:
  • -;-

  • Venue:
  • ICECCS '99 Proceedings of the 5th International Conference on Engineering of Complex Computer Systems
  • Year:
  • 1999

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Abstract

The aim of this paper is to present a convenient test architecture for the purpose of testing timed systems. A timed system is described as timed automaton which is expressed as a region graph. This latter is then translated into a flattened automaton. Test sequences are derived from the flattened automaton. In order to check the conformity of a real life implementation, we detail the test architecture needed to execute the derived test sequences. This architecture considers the behavior part as well as the timed part of the system.