Trading Bandwidth for Latency: Managing Continuations Through a Carpet Bag Cache

Authors:
Richard C. Murphy;Peter M. Kogge
Affiliations:
-;-
Venue:
IWIA '02 Proceedings of the International Workshop on Innovative Architecture for Future Generation High-Performance Processors and Systems (IWIA'02)
Year:
2002

Citing 0
Cited 2

Characterizing a new class of threads in scientific applications for high end supercomputers

Proceedings of the 18th annual international conference on Supercomputing
Enhancing NIC Performance for MPI using Processing-in-Memory

IPDPS '05 Proceedings of the 19th IEEE International Parallel and Distributed Processing Symposium (IPDPS'05) - Workshop 9 - Volume 10

Quantified Score

Hi-index	0.00

Visualization

Abstract

Advances in semiconductor technology have several impacts on processor design. One impact is that faster clock rates and slower wires will limit the number of transistors reachable in a single cycle. Another impact is that power management is becoming ...