False Path Elimination in Quasi-Static Scheduling

• Authors: G. Arrigoni;L. Duchini;C. Passerone;L. Lavagno;Y. Watanabe
• Venue: Proceedings of the conference on Design, automation and test in Europe
• Year: 2002

We have developed a technique to compute a Quasi StaticSchedule of a concurrent specification for the software partitionof an embedded system. Previous work did not takeinto account correlations among run-time values of variables,and therefore tried to find a schedule for all possibleoutcomes of conditional expressions. This is advantageouson one hand, because by abstracting data values one canfind schedules in many cases for an originally undecidableproblem. On the other hand it may lead to exploring falsepaths, i.e., paths that can never happen at run-time due toconstraints on how the variables are updated. This affectsthe applicability of the approach, because it leads to an explosion in the running time and the memory requirements ofthe compile-time scheduler itself. Even worse, it also leadsto an increase in the final code size of the generated software.In this paper, we propose a semi-automatic algorithm tosolve the problem of false paths: the designer identifies andtags critical expressions, and synchronization channels areautomatically added to the specification to drive the searchof a schedule. As a proof of concept, the proposed techniquehas been applied to a subsystem of an MPEG-2 decoder, andallowed us to find a schedule that previous techniques couldnot identify.