Run-time support for heterogeneous multitasking on reconfigurable SoCs
Integration, the VLSI Journal - Special issue: Networks on chip and reconfigurable fabrics
Increasing analog programmability in SoCs
IPDPS'06 Proceedings of the 20th international conference on Parallel and distributed processing
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The argument against ASIC SoCs is that they havealways taken too long and cost too much to design. Asnew process technologies come on line, the issue ofinflexible, unyielding designs fixed in silicon becomes aserious concern. Without the flexibility of reconfigurablelogic, will standard cell ASICs disappear and go the wayof gate arrays? Will ASIC manufacturers lose their edgein providing intellectual value and become merepurveyors of square die area?The argument in favor of FPGAs is that they havealways provided great design flexibility because theywere configurable. The argument against FPGAs is thatcompared to ASICs they have always been larger, slowerand more expensive. Will FPGAs ever become efficientenough to replace ASICs in volume productionapplications? ASSPs can be designed with partialreconfigurability. Will they become the norm? Or, willnew reconfigurable logic cores change the SoC gamecompletely?The answers to these questions will clearly impactsystem designers throughout the world and shape thefuture of the electronics industry. A panel of key industryexecutives each coming from a different area of themarket with unique views will debate these highlycontroversial topics.