A VLSI architecture for cellular automata based parallel data compression
VLSID '96 Proceedings of the 9th International Conference on VLSI Design: VLSI in Mobile Communication
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Summary form only given. Reports a parallel scheme for text data compression. The scheme utilizes the simple, regular, modular and cascadable structure of cellular automata (CA) with local interconnection structure that ideally suits VLSI technology. The state transition behaviour of a particular class of non-group CA, referred to as TPSA (two predecessor single attractor) CA, has been studied extensively and the results are utilized to develop a parallel scheme for data compression. The state transition diagram of a TPSA CA generates a unique inverted binary tree. This inverted binary tree is a labeled tree whose leaves and internal nodes have a unique pattern generated by the CA in successive cycles. This unique structure can be viewed as a dictionary for text compression. In effect, storage and retrieval of dictionary of conventional data compression techniques get replaced by the autonomous mode operation of the CA that generates the dictionary dynamically with appropriate mapping of dictionary data to CA states wherever necessary.