IEEE Transactions on Parallel and Distributed Systems
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Abstract: Worldwide server revenue is dominated by symmetric multiprocessor (SMP) systems. The architecture and implementation of the interconnect that maintains system-wide cache coherency is critical to the performance and scalability of SMP systems. This paper describes the Sun(tm) Fireplane SMP interconnect protocol, and the implementation choices we made for the mid-sized Sun Fire(tm) 3800-6800 servers.