Pattern-driven prefetching for multimedia applications on embedded processors
Journal of Systems Architecture: the EUROMICRO Journal
A PAB-based multi-prefetcher mechanism
International Journal of Parallel Programming
Optimal multistream sequential prefetching in a shared cache
ACM Transactions on Storage (TOS)
Memory resource allocation for file system prefetching: from a supply chain management perspective
Proceedings of the 4th ACM European conference on Computer systems
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Abstract: The need for a low power, high performance embedded processor has grown at a very fast pace in recent years. Embedded processors require smaller cache size for low power system-on-a-chip consideration. Decreasing cache size leads to reduced power consumption because a smaller cache has less capacitance from the bit array size as well as smaller drivers in decoder or peripheral circuitry. Unfortunately, performance also decreases due to a lower cache hit rate when the cache size becomes smaller. Recently, to improve the miss rate on a cache, many prefetching schemes have been introduced. However, on a small cache, prefetching schemes do not perform well because prefetched data replace the data that a processor will need in the future. This causes cache pollution, which degrades system performance. To overcome the cache pollution on a small cache, this paper introduces a new technique called "Fixed Prefetch Block" that integrates with prefetching scheme. To evaluate the effectiveness of our scheme, extensive simulations on SPEC95 integer benchmarks and Mediabench benchmarks suites were performed. Results from the simulations indicate that with our proposed technique, cache pollution can be reduced on a small set associative cache.