The directory-based cache coherence protocol for the DASH multiprocessor
ISCA '90 Proceedings of the 17th annual international symposium on Computer Architecture
Euro-Par '97 Proceedings of the Third International Euro-Par Conference on Parallel Processing
Adaptable Distributed Shared Memory: A Formal Definition
Euro-Par '98 Proceedings of the 4th International Euro-Par Conference on Parallel Processing
Consistency model transitions in shared memory
Consistency model transitions in shared memory
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Abstract: A memory consistency model specifies certain aspects of the behavior of a memory system. Stronger consistency models are easier for programmers to use, but provide less flexibility for optimizing the memory implementation. More relaxed consistency models are just the opposite. The goal of our work is to develop a framework that captures the relationships among existing models, and maps the territory of possible models that have not yet been discovered. This work is based on the idea of orthogonal consistency properties. We hypothesize that all consistency models can be represented by different combinations of a few primitive properties. The work in this paper comes from examining the PRAM, cache, processor, and causal consistency models. Processor is a combination of PRAM and cache, and causal is a combination of PRAM plus an additional requirement. These factors suggest an underlying structure to the models.