A heterogeneously segmented cache architecture for a packet forwarding engine
Proceedings of the 19th annual international conference on Supercomputing
Two-level mapping based cache index selection for packet forwarding engines
Proceedings of the 15th international conference on Parallel architectures and compilation techniques
Efficient Prefix Updates for IP Router Using Lexicographic Ordering and Updatable Address Set
IEEE Transactions on Computers
A fast and scalable IPv4 and 6 address lookup algorithm
Computer Communications
IP address lookup for internet routers using balanced binary search with prefix vector
IEEE Transactions on Communications
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IP address lookup at the router is a complexproblem. This has been primarily due to theincreasing table sizes, growth in traffic rate andhigh link capacities. In this work we haveproposed an algorithm for fast routing lookupwith reduced memory utilization and access time.This approach shows significant performanceimprovement in the average case and optimizesthe overall time taken for packet routing. Sincestorage requirement, processing time and numberof lookups performed are reduced, powerconsumption by the router is also reduced. Oursimulation result indicates that the proposedtechnique works approximately 4.11 times betterthan the standard LC Trie approach in theaverage case.