Automatic Verification of Fault Tolerance Using Model Checking

  • Authors:
  • Tomoyuki Yokogawa;Tatsuhiro Tsuchiya;Tsuchiya Kikuno

  • Affiliations:
  • -;-;-

  • Venue:
  • PRDC '01 Proceedings of the 2001 Pacific Rim International Symposium on Dependable Computing
  • Year:
  • 2001

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Abstract

Model checking is a technique that can make averificationfor finite state systems absolutely automatic.We pro-posea method for automatic verification of fault-tolerantsystems using this technique.Unlike other related work,which is tailored to specific systems, we are aimed at providinga general approach to verification of fault tolerance.The main obstacle in model checking is state explosion.Toavoid the problem, we design this method so that it canuse SMV, a symbolic model checking tool.Symbolic modelchecking can overcome the problem by expressing the statespace and the transition relation by Boolean functions. Assuming that a system to be verified is specified by guardedcommands, we define a modeling language suited for describingguarded command programs and propose a translationmethod from the modeling language to the input languageof SMV.We show the results of applying the proposedmethod to various examples to demonstrate the usefulness.