Computer architecture: a quantitative approach
Computer architecture: a quantitative approach
Programming fine-grained reconfigurable architectures
Programming fine-grained reconfigurable architectures
Reconfigurable Computing: Viable Applications and Trends
VLSI '99 Proceedings of the IFIP TC10/WG10.5 Tenth International Conference on Very Large Scale Integration: Systems on a Chip
Quantitative analysis of floating point arithmetic on FPGA based custom computing machines
FCCM '95 Proceedings of the IEEE Symposium on FPGA's for Custom Computing Machines
Novel HW architecture based on FPGAs oriented to solve the eigen problem
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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Abstract: The use of FPGAs(Field Programmable Gate Arrays) in the area of rapid prototyping and reconfigurable computing has been successfull in the past [1]. Although many experiments have shown FPGAs to be faster than general purpose processors and more flexible than ASICs(Application Specific Integrated Circuits) on some classes of problems, few experiments have offered a computing platform which exploits the reconfigurability aspect of FPGAs and combine FPGAs and processors to provide better solutions on applications. The goal of this paper is to show through an efficient implementation of the Singular Value Decomposition( SVD) of very large matrices, the possibility of integrating FPGAs as part of a Distributed Reconfigurable System (DRS). A cluster of 8 worstations with two FPGA-boards was built for this purpose. The algorithm is currently running as a pure software solution, but we are working to integrate the FPGAs in the computation. First results are encouraging, showing that the performance of the new platform can be high compare to pure software solutions.