Verifiable Embedded Real-Time Application Framework

  • Authors:
  • Pao-Ann Hsiung;Feng-Shi Su;Chuen-Hau Gao;Shu-Yu Cheng;Yu-Ming Chang

  • Affiliations:
  • -;-;-;-;-

  • Venue:
  • RTAS '01 Proceedings of the Seventh Real-Time Technology and Applications Symposium (RTAS '01)
  • Year:
  • 2001

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Abstract

Abstract: A new application framework called Verifiable Embedded Real-Time Application Framework (VERTAF) is proposed for embedded real-time application development, with the aim of reducing design errors and increasing design productivity. VERTAF is an integration of three technologies: object-oriented, software component, and formal verification. It consists of five software components: Implanter, Modeler, Scheduler, Verifier, and Generator. Experiences of using VERTAF show a significant increase in design productivity through design reuse, and a significant decrease in design time and effort through design verification.