Restricted Branching Programs and Hardware Verification

  • Authors:
  • S. J. Ponzio

  • Affiliations:
  • -

  • Venue:
  • Restricted Branching Programs and Hardware Verification
  • Year:
  • 1995

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Abstract

Recent developments in the field of digital design and hardware verification have found great use for restricted forms of branching programs. In particular, oblivious read-once branching programs (also called "OBDD''s") are central to a very common technique for verifying circuits. These programs are useful because they are easily manipulated and compared for equivalence. However, their utility is limited because they cannot compute in polynomial size several simple functions--most notably, integer multiplication. This limitation has prompted the consideration of alternative models, usually restricted classes of branching programs, in the hope of finding one with greater computational power but also easily manipulated and tested for equivalence. Read-once (non-oblivious) branching programs can to some degree be manipulated and tested for equivalence, but it has been an open question whether they can compute integer multiplication in polynomial size. The main result of this thesis proves they cannot--multiplication requires size 2. This is the first lower bound for multiplication on non-oblivious branching programs. By defining he appropriate kind of problem reduction, which we call read-once reductions , we are able to show that our result implies the same asymptotic lower bound for other arithmetic functions. We also survey known results about hte various alternative models, describing the main techniques used for thinking about their computation and for proving lower bounds. These techniques are illustrated with two proofs that have not appeared in the literature.. We summarize the known results by taking a structural approach of comparing the complexity classes corresponding to the various models.