The Stack Growth Function: Cache Line Reference Models
IEEE Transactions on Computers
The 1988–89 Taulbee survey report
Communications of the ACM
Modeling multiprocessor computer systems with unbalanced flows
SIGMETRICS '86/PERFORMANCE '86 Proceedings of the 1986 ACM SIGMETRICS joint international conference on Computer performance modelling, measurement and evaluation
Propeties of storage hierarchy systems with multiple page sizes and redundant data
ACM Transactions on Database Systems (TODS)
Performance Analysis of Cache Memories
Journal of the ACM (JACM)
Bibliography on paging and related topics
ACM SIGOPS Operating Systems Review
Applying program restructuring to dataflow environments
SAC '86 Proceedings of the 1986 workshop on Applied computing
Instruction reference patterns in data flow programs
ACM '80 Proceedings of the ACM 1980 annual conference
| Hi-index | 0.02 |
The relationship between page size, program behavior, and page fetch frequency in storage hierarchy systems is formalized and analyzed. It is proven that there exist cyclic program reference patterns that can cause page fetch frequency to increase significantly if the page size used is decreased (e.g., reduced by half). Furthermore, it is proven in Theorem 3 that the limit to this increase is a linear function of primary store size. Thus, for example, on a typical current-day paging system with a large primary store, the number of page fetches encountered during the execution of a program could increase 200-fold if the page size were reduced by half. The concept of temporal locality versus spatial locality is postulated to explain the relationship between page size and program behavior in actual systems. This concept is used to develop a technique called the "tuple-coupling" approach. It is proven in Theorem 5 that storage system replacement algorithms, tuple-couple yields the benefits of smaller page sizes without the dangers of explosive page fetch activity. Consistent with the results above and by generalizing conventional two-level storage systems, a design for a general multiple level storage hierarchy system is presented. Particular algorithms and implementation techniques to be used are discussed.