The ProCoS Approach to Correct Systems
Real-Time Systems - Special issue on safety-critical systems
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We propose an objective criterion for determining if, given a specific circuit technology, a gate model is suitable for synthesis and verification. This is based on relating the analog circuit behavior to the digital model behavior using a formal definition of implementation. We show how the criterion is not satisfied for several gate models currently used for synthesizing asynchronous circuits, and illustrate the design errors which occur when these models are used. Finally we introduce a new gate model which is designed to satisfy the criterion.