Software-based instruction caching for embedded processors
Proceedings of the 12th international conference on Architectural support for programming languages and operating systems
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Continuing technology advances have made possible a generation of computers designed for multimedia processing. Although conventional computer architectures can deal effectively with media such as still images, they are constrained in their ability to handle continuous media such as audio and moving images. These media require continuous and predictable real-time capture and delivery of information such as audio samples and images. Current approaches to improving performance have primarily relied on increasing overall clock speeds, adding specialised instructions and increasing memory and cache sizes. These approaches do not guarantee real-time performance, and have the great disadvantage that they increase system cost, size and power consumption. We propose an alternative approach which eliminates those architectural features which give rise to unpredictable behaviour. In this paper we show how to improve the predictability of a cache by using a flexible hardware partitioning scheme, and how to embed this into a complete system.