Synchronizing clocks in the presence of faults
Journal of the ACM (JACM)
Ensuring Fault Tolerance of Phase-Locked Clocks
IEEE Transactions on Computers
Clock synchronization of a large multiprocessor system in the presence of malicious faults
IEEE Transactions on Computers
Proceedings of the fourth annual ACM symposium on Principles of distributed computing
Fundamentals of Computer Alori
Fundamentals of Computer Alori
A new fault-tolerant algorithm for clock synchronization
PODC '84 Proceedings of the third annual ACM symposium on Principles of distributed computing
Fault-tolerant clock synchronization
PODC '84 Proceedings of the third annual ACM symposium on Principles of distributed computing
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An improved implementation of clock synchronization of multiprocessor systems in the presence of malicious faults is proposed. The proposed hardware implementation for the reference clock selection has a lower gate complexity, smaller time delay, and greater flexibility than the previously published implementation. The improvement is achieved by replacing the sorter with a counting encoder and comparators and by introducing threshold generation logic with programmable registers. The scheme has a gate complexity of O(n) and a delay of O(log n), where n is the total number of inputs to a particular clock, and is programmable for different values of n and m, the maximum number of faults.