A first look at the interplay of code reordering and configurable caches
GLSVLSI '05 Proceedings of the 15th ACM Great Lakes symposium on VLSI
Code reordering on limited branch offset
ACM Transactions on Architecture and Code Optimization (TACO)
Dynamic round-robin task scheduling to reduce cache misses for embedded systems
Proceedings of the conference on Design, automation and test in Europe
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