Analysis and optimisation of hierarchically scheduled multiprocessor embedded systems
International Journal of Parallel Programming - Special Issue on Multiprocessor-based embedded systems
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We present a method for providing hard real-time guarantees for traffic through an Asynchronous Transfer Mode (ATM) network. Guaranteed delivery Also implies that we have to guarantee that no cells are lost due to over-full buyers in the network.By using priority queues in the output buyers weallow urgent messages short end-to-end delays, whilestill guaranteeing end-to-end delays for low-prioritymessages.We can determine _a priori if message deadlines willbe met by calculating maximum end-to-end delays andbuyer-needs. Analysis is based on CPU schedulabilityanalysis, which means that it provides a framework foranalysing an entire system, including both CPU andnetwork scheduling.