Locally decodable codes with 2 queries and polynomial identity testing for depth 3 circuits
Proceedings of the thirty-seventh annual ACM symposium on Theory of computing
Fast sparse matrix multiplication
ACM Transactions on Algorithms (TALG)
Arithmetic Circuits: A survey of recent results and open questions
Foundations and Trends® in Theoretical Computer Science
On optimal learning algorithms for multiplicity automata
COLT'06 Proceedings of the 19th annual conference on Learning Theory
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We prove lower bounds on the number of product gates in bilinear and quadratic circuits that compute the product of two n × n matrices over finite fields. In particular we obtain the following results: We show that the number of product gates in any bilinear (or quadratic) circuit that computes the product of two n × n matrices over ${\rm GF}(2)$ is at least 3n2 - o(n2). We show that the number of product gates in any bilinear circuit that computes the product of two n × n matrices over ${\rm GF}(q)$ is at least $(2.5 + \frac{1.5}{q^3 -1})n^2 -o(n^2)$. These results improve the former results of [N. H. Bshouty, SIAM J. Comput., 18 (1989), pp. 759--765; M. Bläser, Proceedings of the 40th Annual IEEE Symposium on Foundations of Computer Science, IEEE Computer Society, Los Alamitos, CA, 1999, pp. 45--50], who proved lower bounds of 2.5 n2 - o(n2).