Optimizing instruction TLB energy using software and hardware techniques
ACM Transactions on Design Automation of Electronic Systems (TODAES)
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Translation Look-aside Buffer (TLB), which is small ContentAddressable Memory (CAM) structure used to translate virtualaddresses to physical addresses, can consume significant energy insome architectures. In addition, its power density is high, due toits small area. Consequently, reducing power consumption of TLB isimportant for both high-end and low-end systems. While a large TLBmight be preferable from the performance angle, it can also lead toexcessive dynamic energy consumption. This paper focuses on dataTLB (dTLB), and proposes an architectural solution to this problemwhich is based on dynamically resizing the dTLB consideringapplication execution behavior. Our objective is to give theapplication the minimum dTLB size (at any point)withoutsignificantly degrading its performance. We present two differentimplementations of this idea, and give experimental datademonstrating that it is very effective in practice.