CHI '86 Proceedings of the SIGCHI Conference on Human Factors in Computing Systems
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Task oriented visual interface for debugging timing problems in hardware design
Proceedings of the working conference on Advanced visual interfaces
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We present a proposal to demonstrate some of the visual interfaces used in the suite of High-Level Hardware Synthesis tools developed by Synopsys Inc. Hardware Synthesis is the process of converting a high-level description of the hardware in a "hardware description language" (HDL) like Verilog or VHDL into a list of gates that can be fabricated in silicon.