Visual interfaces for high level hardware synthesis

  • Authors:
  • Shamim Mohamed;Erric Solomon

  • Affiliations:
  • Synopsys Inc., Mountain View, CA;Synopsys Inc., Mountain View, CA

  • Venue:
  • AVI '98 Proceedings of the working conference on Advanced visual interfaces
  • Year:
  • 1998

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Abstract

We present a proposal to demonstrate some of the visual interfaces used in the suite of High-Level Hardware Synthesis tools developed by Synopsys Inc. Hardware Synthesis is the process of converting a high-level description of the hardware in a "hardware description language" (HDL) like Verilog or VHDL into a list of gates that can be fabricated in silicon.