On Synthesis of Easily Testable (k, K) Circuits

  • Authors:
  • Srinath R. Naidu;Vijay Chandru

  • Affiliations:
  • -;-

  • Venue:
  • IEEE Transactions on Computers
  • Year:
  • 2003

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Abstract

A (k,K) circuit is one which can be decomposed into nonintersecting blocks of gates where each block has no more than K external inputs, such that the graph formed by letting each block be a node and inserting edges between blocks if they share a signal line, is a partial k-tree. (k,K) circuits are special in that they have been shown to be testable in time polynomial in the number of gates in the circuit, and are useful if the constants k and K are small. We demonstrate a procedure to synthesise (k,K) circuits from a special class of Boolean expressions.